Brubru Deep Dive Library
Chips Act 2.0
The Commission's second-generation semiconductor law, read pillar by pillar. It repeals the first Chips Act and rebalances toward demand and industrial deployment: a reinforced Chips for Europe Initiative 2.0, EU strategic projects with a flagship advanced-manufacturing open foundry, and a sharper crisis-response mechanism. Adopted by the College on 3 June 2026.
The first Chips Act built capacity but did not close the gap
The first European Chips Act (Regulation (EU) 2023/1781) mobilised over EUR 52 billion under Pillar II and built EU pilot lines, competence centres and the European Semiconductor Board. Yet the EU still produces less than 10% of the world's semiconductors and is almost entirely dependent on the US and Asia for advanced nodes below 5nm, including AI chips. Semiconductors are now the world's third most-traded commodity (after oil and vehicles), with the market heading toward USD 1.6 trillion by 2030. The Draghi report and the Semicon Coalition Declaration, signed by all 27 Member States in September 2025, called for a reinforced Chips Act 2.0.
Chips Act 2.0 is one component of the European Technological Sovereignty Package adopted on 3 June 2026, alongside the Cloud and AI Development Act (CADA), the EU Open Source Strategy, and the Strategic Roadmap for Digitalisation and AI in Energy. Lead: Executive Vice-President Henna Virkkunen, DG CNECT. Legal bases: Articles 173(3) + 114 TFEU.
Two objectives, three pillars, eight chapters
Two overarching objectives: (1) increase the competitiveness of the European semiconductor value chain to improve technological sovereignty and resilience; (2) enhance crisis preparedness to ensure security of supply. Three specific objectives: capacity, security of supply and competitiveness across the value chain (including leading-edge AI chips); a strong user market; and intelligence for crisis preparedness.
| Pillar / Chapter | What it does |
|---|---|
| Pillar I - Chips for Europe Initiative 2.0 (Ch. II) | R&D&I and capacity building: design, pilot lines, quantum chips, competence centres, photonics, Chips Fund, grand challenges, demand forum. |
| Pillar II - Security of supply and demand (Ch. III) | European semiconductor technology initiatives, strategic projects, the advanced-manufacturing open foundry, fast-track permits, Regions of Excellence, procurement resilience. |
| Pillar III - Monitoring and crisis response (Ch. IV) | Strategic mapping, the B2B supply-chain platform, crisis stage, priority-rated orders, common purchasing. |
| Governance + final (Ch. V-VIII) | European Semiconductor Board, Industrial Alliance, national authorities, penalties, delegated acts, review. |
Six operational objectives, plus demand-side levers
| Component | What it does |
|---|---|
| 1. Advanced design | The virtual design platform for academia, start-ups, SMEs and fabless firms. |
| 2. Pilot lines + testbeds | Test, validate and industrialise cutting-edge and next-generation technologies. |
| 3. Quantum chips | Pilot lines, design libraries and validation facilities for quantum chips. |
| 4. Competence centres | At least one per Member State (building on the European Digital Innovation Hubs), plus skills. |
| 5. Photonics (new) | Design, prototyping and manufacturing of photonic integrated circuits, a new sixth objective. |
| 6. Chips Fund | Access to finance for start-ups, scale-ups and SMEs via the EIC Accelerator and InvestEU. |
The Initiative adds "grand challenges" (large cross-sectoral missions on AI chips, energy-efficient compute and leading-edge capacities), coordinated with CADA's grand challenges and the EuroHPC Joint Undertaking. New demand-side instruments, a demand forum, demand accelerators and chip innovation procurement, run through the Industrial Alliance for Semiconductors, aim to pull European production. The Initiative is funded by Horizon Europe and the Digital Europe Programme and implemented by the Chips Joint Undertaking.
Initiatives, strategic projects and a flagship open foundry
European semiconductor technology initiatives (the successors to the first Act's integrated production facilities and open EU foundries) are carried out by domestic undertakings, must be "first-of-a-kind", must join the B2B Platform and accept priority-rated orders, and get preferential pilot-line access. Importantly, the status no longer depends on receiving public support. Strategic projects meet six criteria (Union added value, domestic undertaking, reduced supply-chain dependence, cross-border dimension, resilience, technological sovereignty), are designated through the Chips Joint Undertaking, and receive the competitiveness seal under the European Competitiveness Fund.
A Union-based open foundry for advanced semiconductor manufacturing, combining leading-edge node manufacturing with chiplet integration and 2.5D/3D packaging, is treated with the highest priority under the Competitiveness Coordination Tool. Pilot production is envisaged for 2030 to 2033.
Indicative investment ranges from the proposal
Cutting the EU's permitting disadvantage
Permitting and design phases for advanced fabs in the EU run about 7.5 months longer than in competing jurisdictions, adding roughly EUR 625 million to a EUR 20 billion plant. Chips Act 2.0 sets a permit-granting cap of 12 months from a complete application, a one-stop shop in each Member State (45-day completeness check), and a single access portal using the new European Business Wallets, with the highest national significance where national law allows. A new European Semiconductor Region of Excellence label, awarded by the Commission on a regional application endorsed by the Member State and built on a Region Investment Plan, signals high-potential ecosystems to investors; recognised regions join a dedicated Network.
For procurement in NIS2 sectors, contracting authorities may require a security-of-supply declaration on the sourcing of semiconductors (supplier diversity, domestic-undertaking share, dual sourcing). The Commission can designate risk-prone sectors and, where risks persist, require mitigation (dual sourcing, stockpiling, diversification). A cost difference above 25% may be presumed disproportionate.
A supply-chain digital twin and an emergency toolbox
The Commission, with the European Semiconductor Board, runs a strategic mapping of the value chain and maintains early-warning indicators. The Business-to-Business Semiconductor Supply Chain Platform is a "digital twin" of the supply chain (domestic undertakings only) that aggregates data, stress-tests the chain and issues early warnings; participants are exempt from pre-crisis information requests. An EU Blueprint for semiconductor crisis management is due by the second quarter of 2027.
| Crisis tool | What it does |
|---|---|
| Crisis stage (Art 39) | Activated by the Council by qualified majority, for up to 12 months (prolongable). |
| Information gathering (Art 41) | The Commission can require production and disruption data from supply-chain undertakings. |
| Priority-rated orders (Art 42) | Initiatives and strategic projects can be obliged to accept and prioritise crisis-relevant orders, overriding contracts at a fair price, with a liability exemption. |
| Common purchasing (Art 43) | On request from two or more Member States, the Commission acts as a central purchasing body. |
Chips Act 2.0 (COM(2026) 504) vs the first Chips Act (Reg (EU) 2023/1781)
| Area | First Chips Act (2023/1781) | Chips Act 2.0 (COM(2026) 504) |
|---|---|---|
| Orientation | Supply-driven | Demand + supply (innovation procurement, demand forum) |
| Strategic Projects | Not a distinct instrument | EU strategic projects + competitiveness seal (ECF) |
| Flagship | Integrated production facilities | Highest-priority advanced-manufacturing open foundry |
| Initiative scope | 5 operational objectives | 6 (adds photonics) + grand challenges + Chips Fund |
| Regions | None | Semiconductor Region of Excellence label + Network |
| Supply intelligence | Voluntary info-sharing | B2B Platform "digital twin" + EU crisis Blueprint |
| Permitting | General | 12-month cap + European Business Wallets |
| Simplification | ECIC concept | ECIC deleted (never used) |
The adopted proposal, its title and the Annex VII correlation table confirm that Chips Act 2.0 repeals Regulation (EU) 2023/1781 (the first Chips Act). The executive summaries of the impact assessment carry a clerical "2023/1782" in their title line; the authoritative repeal target is 2023/1781.
Key figures from SWD(2026) 504 and SWD(2026) 505
The impact assessment received a negative Regulatory Scrutiny Board opinion on 28 January 2026, then a positive opinion with reservations on 30 March 2026. Of the options assessed, the Commission chose the vertical, proactive industrial-policy option (PO2), funding strategic projects through the European Competitiveness Fund. Monitoring indicators (Annex III) include semiconductor FDI inflows, skilled workforce, scale-up funding, the EU's share of global semiconductor value by segment, installed wafer-fab capacity, and the share of the value chain covered by the B2B Platform. The Commission evaluates the Regulation 4 to 5 years after application.
Where the file stands in the ordinary legislative procedure
Brubru tracks Chips Act 2.0 across Chat, the Legislative Tracker and your My Files workspace. Ask "What are the three pillars of Chips Act 2.0?" or "Which strategic-project priority areas does Chips Act 2.0 list?" and Brubru answers from the verified record, then links you straight to the file.